Thursday, October 21, 2010
Time Switch
In time-off mode, it turns your gadget off at the set time. The optional output socket-2 is wired in such a way that when you use this socket, the mode changes without having to flip the mode switch (i.e.mode switch can be omitted). Please refer to the back panel diagram of a typical analogue clock and the audio jack, to see how the existing buzzer of the clock is required to be wired to the audio output from the clock. This will ensure that when plug is inserted in the audio jack, the clock’s buzzer will remain off and not consume any power unnecessarily. The audio alarm output from the clock is coupled to the AF detector built around low-power switching transistor T1. During alarm, the collector of transistor T1 will fluctuate around ground level and Vcc.
During absence of audio alarm input, the collector of transistor T1 is held at Vcc potential. The next stage consists of an S-R latch built around NAND gates N1 and N2. Capacitor C2 and resistor R4 are used for power-on-reset. On switching the power supply, gate N2 output will acquire logic 1 and that of gate N1 logic 0. This is the initial state, irrespective of the position of mode switch. At the time of alarm, when point A connected to collector of transistor T1 passes through logic 0 state, the output logic state of both the gates will toggle. Assuming that mode switch is flipped to ‘Mode Off’ position at power-on-reset (when point D is at logic 1), initially diode D1 would be in blocking state and transistor T2 would be forward biased via resistor R5 and diodes D2 and D3. As a result, the relay is in energised state, which makes output power available at output socket1 and cuts it off from socket-2.
At alarm time, the audio signal toggles logic output states of both gates N1 and N2. As a result, point D goes to logic 0 state. Diode D1 conducts, taking the voltage at junction of diodes D1 and D2 to near about 1 volt. Diode D3 ensures that its series combination with diode D2 puts them in blocking mode. Capacitor C3 meanwhile discharges via resistor R6 and the voltage at base of transistor T2 approaches towards ground level, cutting off transistor T2 and de-energising relay RL1. Now the power at output socket-1 would be cut off while it becomes available in socket-2. If the above operation is repeated with switch S1 in ‘Mode On,’ the power would initially not be available in socket-1 (but available in socket-2). But after the alarm, the power would become available in socket-1 and not in socket-2.
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