Schematic Reference

Pan Pot

A pan pot enables a mono-phonic input signal to be positioned where desired between the stereo loudspeakers. When P1 (see diagram) is in the center position, there is no attenuation or amplification between the input and output. When the control is turned away from the center position, the signal in one channel will be amplified 3 dB more than the other. Circuit IC1 at the input is a buffer stage. It is arranged as an inverter to ensure that the phase of the input signal is identical to that of the output signal. The input impedance is set by R1 (10 kΩ). The output of the buffer is applied to stereo amplifiers IC2 and IC3. A special arrangement here is the positioning of P1, in conjunction with R3, R4, R8, and R9, in the feedback circuits of both amplifiers. This means that any adjustment of the potentiometer will have opposite effects in the amplifiers.

Series resistors R7 and R12 serve to ensure that the outputs can handle capacitive loads. Coupling capacitors C3, C6, and C9, may be omitted if an offset voltage of 20–30 mV is of no consequence in the relevant application. Capacitors C2, C5, and C8, ensure that the op amps remain stable even at unity gain. Capacitors C1, C4, and C7, minimize any r.f. interference, resulting in a usable bandwidth of 2.5 Hz to 200 kHz. The performance of the circuit is of sufficiently high quality to allow the pot being incorporated in good-quality control panels. Total harmonic distortion plus noise (THD+N) at a frequency of 1 kHz and a bandwidth of 22 kHz is 0.0014%. Over the band 20 Hz to 20 kHz and a bandwidth of 80 dB, this figure is still only 0.0023%. The circuit needs a power supply of ±18 V, from which it draws a current of about 16mA.